http://www.lpcnow.com/articles/68605/first-thoughts-on-nxps-new-m0-lpc800-mcus/
Tags: Cortex-M0 , LPC product news
At Electronica today, NXP unveiled the details of their new LPC800 family, their first MCUs based on ARMs smallest, lowest-power core to date, the ARM Cortex M0+. As a long-time ARM Cortex M0 and LPC user, I've really been looking forward to digging into the details of these chips, and seeing where they fit in with the rest of the Cortex M family ... and while the announcement was a surprise, it definately wasn't a disappointment.
What's Different with the M0+?
Based on the extremely popular Cortex M0, any M0+ chips are likely to be aimed at the same market segment -- very power and cost-sensitive embedded solutions, where total die size, efficiency and battery life are important considerations.
Thomas Ensergueix addressed many of the key differences in his blog post ARM Cortex-M0+: More than a Low Power Processor, but it's worth re-highlighting one of the biggest improvements here.
One of the keys to driving the active power consumption of the M0+ even lower was the new two-stage pipeline. As explained by ARM in Introducing the Cortex-M0+ processor: The Ultimate in Low Power:
For the first time, ARM has produced a processor design with a two stage pipeline, and used the opportunity to improve the performance while maintaining a very similar maximum frequency. The overall result is very encouraging. When compared to the existing Cortex-M0 processor, the Cortex-M0+ processor consumes only two thirds of the dynamic power in our power analysis test, when running Dhrystone loops.
... By moving to a two stage pipeline design, the branch shadow of the processor is reduced. As a result, the number of accesses to Flash memory is cut. Flash memory power often contributes the majority of the power consumed in a microcontroller so any reduction in Flash accesses has then a very direct effect on the overall power.
The M0+ now also allows single-cycle IO access (compared to two cycles on the M0), making things like fast bit-banging potentially twice as fast as the earlier M0 ... all with a smaller total footprint and lower power consumption. This is an important point since I often found myself leaning towards the M3 for the extra performance boost, but now that the M0+ can execute certain IO tasks almost as efficiently on a much smaller core I can get similar performance with a lower overall energy footprint and BOM cost.
Implementation Matters!
As important as that architectural improvement is, though, the peripherals are where all the magic is and what any real world decision is based on. ARM provides an equal playing field to everyone with their cores, but I was curious how Freescale and NXP would compare since they are the two companies offering the M0+ coming out of the gate.
The NXP chips were actually a surprise for me in this regard. I expected the Freescale and NXP chips to be reasonably competitive with each other feature for feature, but they are clearly solving very different problems with their respective chips. NXP is positioning the LPC800s as direct replacements for basic 8-bit MCUs, which is a very natural space for a core this small and efficient, whereas Freescale is positioning their M0+ chips as a much more mid-range solution (with the added cost and complexity that goes with that). This makes sense since Freescale has a much bigger gap to fill with their heavy emphasis on the M4, whereas NXP already covers the entire range from M0 to M3 to M4 very well (LPC1100 for the M0, LPC1300 for entry-level M3, LPC1700 and LPC1800 for high-end M3, and LPC4300 for M4 DSP-type processing and heavy embedded lifting).
The First Real ARM-Based 8-Bit Replacement?
Probably along with a lot of other people, I was expecting something resembling an M0+ version of the popular LPC1100 series (though I imagine this is the works as well). But thinking about the chips following the announcement, NXP has made an insightful decision to position their first M0+ devices where they did as a bridge from 8-bit to 32-bit, since they already have the rest of the deeply embedded spectrum well-covered.
There's been a lot of talk about ARM taking over the embedded world, but the reality is that there is still a hefty chasm between 8-bit applications and entry level M0 devices like the LPC1100 chips, and it goes beyond SW or MCU cores. Many low-cost products where 8-bit dominates are still assembled by hand or via wave-soldering with packages like TSSOP or DIP, whereas (with some rare exceptions like the DIP LPC1114) ARM has largely been confined to more modern, machine-placeable packages like QFN, QFP or BGA. Price has also been an issue, even with the $1 LPC111x chips breaking new ground at the time of their release (though they're still an impressive value today!), but those rules definately change with the $0.39 LPC800 chips in very familiar DIP and TSSOP packages.
New Peripherals
Now that I finally have an early sample in my hands, I'm eager to jump into the technical details of the chip, and get my hands dirty trying out some of the peripherals, but while I'm setting things up some of the key highlights of these new chips are listed below:
The new switch matrix (video overview) adds a surprising amount of flexibility, allowing you to easily assign any function to any pin with a single line of code. The main advantage here is the ability to creating small, clean 2-layer boards by remapping any pin to any function.
The core IP blocks have been simplified to make I2C, SPI and USART access painless to use, adding drivers into the ROM so that you also save some valuable flash space and avoid code bloat, and also making them much friendlier in low-power scenarios like decoupling the SPI clock from the core clock which previously had to be run at 4x the SPI clock rate.
There's also an interesting new pattern match engine for interrupts where a combination of pins states can be configured to throw an interrupt, the state configurable timer (SCT) for programmable state management with 16 and 32-bit timers/counters, and an analog comparator with internal or external reference levels.
NXP provides an excellent overview of the chip in the official NXP announcement, but as I have a chance to dig into the peripherals myself with some real HW and code I'll have a better look at each of these new peripherals, and post some further thoughts here on the kinds of problems I can see them solving.
I'm looking forward to writing up a bit more about this chip and testing things out in practice ... and really seeing how deep this potential nail in the 8-bit coffin goes!
- See more at: http://www.lpcnow.com/articles/68605/first-thoughts-on-nxps-new-m0-lpc800-mcus/#sthash.XsbMsXbR.dpuf
microBuilder.eu, meet Adafruit.com - Saturday, May 07, 2011
http://www.microbuilder.eu/blog/11-05-07/microBuilder_eu_meet_Adafruit_com.aspx
We're happy to announce that effective 1 May, 2011 microBuilder.eu will be partnering up with the wonderful team over at Adafruit Industries. We've been casually working with them for the past year or so on a few OSHW projects, and are happy to try to contribute even more actively to their mission of educating people and providing freely reusable HW reference designs, tutorials and educational material to help people build better projects and products themselves.
What this means in practice is that sales of our most popular products will now be handled by Adafruit.com, freeing us up to get back to our original objective (and the namesake of this site): teaching people about micro-manufacturing, and providing easy to use, open-source HW and SW building blocks to make better products themselves!
Adafruit offers some of the best service you'll find on any commercial website, and we're happy to work with a company that gives back far more to the OSHW community than it takes!
We'll continue developping all of our existing HW reference designs and SW libraries, and hope that this will actually free up more time and resources to be able to invest in producing new tutorials and resources in the areas that interest us: small-scale manufacturing and product design, the 'mid-range' MCUs used in most commercial products, UI and graphical design, etc.
A sincere thanks to all of the people who have supported us in the past year with your orders, and we hope you'll continue to support both us and the larger OSHW community by supporting Adafruit Industries in the future.
.END
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