Anyway, I dug into the header files and found that LPC_GPIOx is defined in system_lpc11xx.h. It says the following.
/* Peripheral memory map */
/* Base addresses */
...
#define LPC_AHB_BASE (0x50000000UL)
...
/* AHB peripherals */
...
#define LPC_GPIO_BASE (LPC_AHB_BASE + 0x00000)
/* Peripheral declaration */
...
#define LPC_GPIO1 ((LPC_GPIO_TypeDef *) LPC_GPIO1_BASE )
So I now guess LPC_GPIOx is a variable representation a might be a control register mapped to a memory location. But what is the following weird thing?
((LPC_GPIO_TypeDef *) LPC_GPIO1_BASE )
system_lpc11xx.h
...
/******************************************************************************/
/* Peripheral memory map */
/******************************************************************************/
/* Base addresses */
...
#define LPC_AHB_BASE (0x50000000UL)
...
/* AHB peripherals */
#define LPC_GPIO_BASE (LPC_AHB_BASE + 0x00000)
#define LPC_GPIO0_BASE (LPC_AHB_BASE + 0x00000)
#define LPC_GPIO1_BASE (LPC_AHB_BASE + 0x10000)
#define LPC_GPIO2_BASE (LPC_AHB_BASE + 0x20000)
#define LPC_GPIO3_BASE (LPC_AHB_BASE + 0x30000)
/******************************************************************************/
/* Peripheral declaration */
/******************************************************************************/
#define LPC_GPIO1 ((LPC_GPIO_TypeDef *) LPC_GPIO1_BASE )
#define LPC_GPIO2 ((LPC_GPIO_TypeDef *) LPC_GPIO2_BASE )
#define LPC_GPIO3 ((LPC_GPIO_TypeDef *) LPC_GPIO3_BASE )
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